1. Field of the Invention
The present invention relates to a design method for multilayer wiring board which is made of an interconnection design using a via hole for interconnecting only adjacent layers. In the present invention, a multilayer wiring board refers to a wiring board which has an electronic component such as LSI (Large Scale Integration) mounted on a surface thereof, and has at least two or more signal layers thereinside.
Specifically, the present invention relates not to a wiring board in which layers are interconnected by a through hole, but to a multilayer wiring board in which interconnection of layers is realized with combination of via holes which interconnect adjacent layers. In the present invention, a wring board in which layers are interconnected by a through hole refers to a general printed circuit board.
In addition, the present invention relates to a multilayer wiring board in which overlapping of via holes (stacked via) is not allowed.
2. Description of the Related Art
Unexamined Japanese Patent Application KOKAI Publication No. H5-243731 is a Patent Gazette which relates to a prior art of the multilayer wiring board designing method of the present invention, and is similar to the present invention since it considers a structure and design of a multilayer wiring board.
However, the technology (multi thin film layer wiring board) disclosed in the above Unexamined Japanese Patent Application KOKAI Publication No. H5-243731 is a technology aiming for allowing utilization of interconnection routing tools for conventional general-purpose multilayer wiring boards, by designing interconnection terminals of all pairs of layers including via holes to be at the same coordinates. Thus, this technology is essentially different from the present invention which aims for improving a design efficiency for a multilayer wiring board by presetting parameters for each kind of built-up via hole.
For example, a built-up wiring board and a polyimide thin film wing board are multilayer wiring boards suitable as the target of applying the present invention. A polyimide thin film wiring board refers to a wiring board made of a base Ceramic wiring board having a polyimide thin film on the surface layer thereof. That is, a polyimide thin film wiring board is a multilayer wiring board formed by using photosensitive polyimide resin as an insulation material, forming a via hole in this resin layer, and forming a wiring layer using photolithography, vacuum deposition or sputtering, and plating technology. Each time the series of those processes is performed, a set of an insulation layer and a wiring layer is formed, and by repeating those processes, a multilayer wiring board is completed.
FIG. 9 is a diagram showing a structure of a specific example of a built-up wiring board, which is the most typical example of the multilayer wiring board according to the present invention. FIG. 9 shows a single-side four layered built-up wiring board.
The built-up wiring board of the present invention is formed of a core substrate (base substrate) and a built-up layer.
A glass epoxy resin as an insulation material, which is used as a general printed circuit board, is used as the core substrate. Through holes formed in order to interconnect the top surface and bottom surface of the core substrate. The core substrate functions as a structural base for supporting the whole wiring board, and also functions as a low-density layer such as a power source layer, a ground layer, etc.
On the other hand, the built-up layered portion is formed by alternately laminating a required number of wiring made by copper plating, and epoxy resin layers as insulation layers, on the core substrate. At that time, as means for forming via holes for interconnecting the built-up layered portion, there is a method of forming via hales by etching using photolithography, and a method of directly forming via holes using laser.
The built-up wiring board shown in FIG. 9 is formed as described below, and is formed as a wiring board corresponding to higher density LSI terminals.
That is, the built-up Wiring board according to the present invention uses a sheet of a glass cloth soaked with ordinary epoxy resin as an insulation material, and uses a printed circuit board in which internal and external layers are electrically interconnected by through holes as the core substrate. A photosensitive resin insulation layer is formed on the core substrate.
The built-up layered portion of the built-up wiring board according to the present invention is formed by sequentially depositing built-up layers (B1 layer to B4 layer in FIG. 9) while forming built-up via holes having extremely small diameters by photolithography and laser, connecting the presently-built-up layer to the underneath layer by plating and forming routes by plating.
In such a built-up wiring board, no interlayer connection via holes other than via holes that interconnects only adjacent layers are allowed.
Therefore, as shown in a perspective diagram of FIG. 10A, a signal route (a signal route using a plurality of via holes), which goes through the B2 layer sandwiched between the B3 layer and B1 layer, includes a first via hole which interconnects the B3 layer and the B2 layer, a second via hole which interconnects the B2 layer and the B1 layer, and a short route which connects the bottom land of the first via hole and the top land of the second via hole. In the present specification, such a signal route as made of plurality of via holes and a short route is referred to as a built-up via.
FIG. 10B shows a cross section which corresponds to the perspective diagram shown in FIG. 10A. A via hole pitch between the bottom land of the first via hole and the top land of the second via hole may preferably be set as the smallest value that is possible when being manufactured, from the viewpoint of improving capacity of the route.
For example, in such a built-up wiring board, via holes that are φ50 micrometer in diameter are formed on lands (both top and bottom) that are φ75 micrometer in diameter by carbon dioxide gas laser. A top land and a bottom land are arranged with a pitch of 100 micrometer, and the route which connects those top and bottom lands has a width of 50 micrometer.
According to the method of manufacturing the built-up wiring board of the present invention, it is prohibited from a manufacturing viewpoint that via holes overlap each other, like the stacked via hole shown in FIG. 11.
Accordingly, as shown in FIGS. 12A and 12B (a perspective diagram and a cross section), a built-up via hole which goes from a B4 layer to a C1 layer will be arranged in a staggered state (zigzag state).
In sum, in a built-up wiring board or a polyimide thin film wiring board, via holes for interconnecting layers are limited to interconnecting only adjacent layers. Thus, in a case where a signal route is routed so that it penetrates at least one or more intervening wiring layers toward the last layer to be reached, via holes for interconnecting all pairs of adjacent layers until the last layer must be sequentially formed, and a route must be routed shortly (to have a short length) in order to shift the via holes. The inventor of the present invention has found a problem in these processes, that is, forming via holes and providing short route must be repeated until the last layer.
Next, with reference to FIG. 13 to FIG. 20, operations required when routing of a multilayer wiring board using a built-up via formed by the technique having the above described problem, will be explained.
In this explanation, a case where a signal net is routed in a B4 layer, and the routed signal net is to be connected to a C1 layer, win be considered.
In this case, a signal net A is firstly routed as shown in FIG. 13. Then, as shown in FIG. 14, the B4 layer and a B3 layer are selected to form a via hole B at a predetermined position. Then, the next step goes to the B3 layer.
Then, as shown in FIG. 15, a short route C having, for example, 100 micrometer is routed in the B3 layer.
Further, as shown in FIG. 16, the B3 layer and the B2 layer are selected to form; a via hole D at the point at which the route C ends. Then, the next step goes to the B2 layer.
Then, as shown in FIG. 17 to FIG. 20, similar steps are repeated until the C1 layer. As a result, a route A, a via hole F, a route G, and a via hole H are formed.
As explained, according to the design method for a multilayer wiring board having the above described problem, steps of forming a via hole which interconnects only adjacent layers, arranging a short route in order to shift the via hole, and forming another via hole must be repeated until the last layer, in order to form a built-up via.
According to the above described conventional design method for designing a multilayer wiring board, via holes for interconnecting layers are Slowed to interconnect only adjacent layers, as described above. Therefore, in a case where via holes need to be formed while penetrating at least one or more intervening wiring layers (in a case where a built-up via is formed), it is necessary to repeat forming a via hole which interconnects only an adjacent layer, routing a short route in order u) shift the via hole, and forming another via hole until reaching the last layer. Thus, there arises a problem that the efficiency of the design becomes very poor.